2 papers
cs.OH2012
Single bit full adder design using 8 transistors with novel 3 transistors XNOR gate
Manoj Kumar, Sandeep K. Arya, Sujata Pandey
In present work a new XNOR gate using three transistors has been presented, which shows power dissipation of 550.7272W in 0.35m technology with supply voltage of 3.3V. Minimu…
cs.OH2010
Level Shifter Design for Low Power Applications
Manoj Kumar, Sandeep K. Arya, Sujata Pandey
With scaling of Vt sub-threshold leakage power is increasing and expected to become significant part of total power consumption In present work three new configurations of level sh…