3 papers
cs.AR2026
From Indiscriminate to Targeted: Functionally Critical Signal-Driven Assertion Generation using LLMs for Efficient RTL Verification
Yonghao Wang, Hongqin Lyu, Boling Chen +9
Functional verification has become the most time-consuming phase in IC development, and Assertion-Based Verification (ABV) is key to reducing debugging time. However, existing LLM-…
cs.AR2026
Lyra: A Hardware-Accelerated RISC-V Verification Framework with Generative Model-Based Processor Fuzzing
Juncheng Huo, Yunfan Gao, Xinxin Liu +4
As processor designs grow more complex, verification remains bottlenecked by slow software simulation and low-quality random test stimuli. Recent research has applied software fuzz…
cs.AR2026
TurboFuzz: FPGA Accelerated Hardware Fuzzing for Processor Agile Verification
Yang Zhong, Haoran Wu, Xueqi Li +4
Verification is a critical process for ensuring the correctness of modern processors. The increasing complexity of processor designs and the emergence of new instruction set archit…