2 papers
cs.AR2026
Low-level optimizations in high-level HDLs: Is there a benefit?
Oliver Keszocze, Tjark Petersen, Arved Friedemann +1
This paper explores the applicability of functional programming to the design of Application-specific Integrated Circuits (ASICs). We investigate the impact of designing ASICs usin…
cs.CY2026
Bringing Chip Tapeout Into University Education
Luca Pezzarossa, Martin Schoeberl, Matti Käyrä +5
Providing students with experience from chip specification to fabricated silicon can strengthen chip-design education, but integrating tapeout into regular teaching is difficult to…