155 citations · 689 across the 31 of their papers we have counts for
8 papers · 1 filter
Progress report on the online processing upgrade at the NA62 experiment
M. Turisini, R. Ammendola, A. Biagioni +10
A new FPGA-based low-level trigger processor has been installed at the NA62 experiment. It is intended to extend the features of its predecessor due to a faster interconnection tec…
Light Detection System and Time Resolution of the NA62 RICH
G. Anzivino, M. Barbanera, A. Bizzeti +20
A large RICH detector is used in NA62 to suppress the muon contamination in the charged pion sample by a factor of 100 in the momentum range between 15 and 35 GeV/c. Cherenkov ligh…
The integrated low-level trigger and readout system of the CERN NA62 experiment
R. Ammendola, B. Angelucci, M. Barbanera +23
The integrated low-level trigger and data acquisition (TDAQ) system of the NA62 experiment at CERN is described. The requirements of a large and fast data reduction in a high-rate…
Recent results and prospects for NA62 experiment
Silvia Martellotti
The decay is theoretically one of the cleanest meson decays and so a good place to look for indirect effects of new physics complementary to LHC search…
GPU-based Real-time Triggering in the NA62 Experiment
R. Ammendola, A. Biagioni, P. Cretaro +17
Over the last few years the GPGPU (General-Purpose computing on Graphics Processing Units) paradigm represented a remarkable development in the world of computing. Computing for Hi…
The NA62 experiment at CERN: status and perspectives
Riccardo Fantechi
The NA62 experiment at CERN will measure the branching ratio of the K+ -> pi+ nu nubar decay with a precision of 10%, collecting about 100 events in two years of run. This paper wi…
A high-resolution TDC-based board for a fully digital trigger and data acquisition system in the NA62 experiment at CERN
Elena Pedreschi, Bruno Angelucci, Carlo Avanzini +8
A Time to Digital Converter (TDC) based system, to be used for most sub-detectors in the high-flux rare-decay experiment NA62 at CERN SPS, was built as part of the NA62 fully digit…
NaNet:a low-latency NIC enabling GPU-based, real-time low level trigger systems
Roberto Ammendola, Andrea Biagioni, Riccardo Fantechi +13
We implemented the NaNet FPGA-based PCI2 Gen2 GbE/APElink NIC, featuring GPUDirect RDMA capabilities and UDP protocol management offloading. NaNet is able to receive a UDP input da…