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cs.AR2026★ 1 cited
RTeAAL Sim: Using Tensor Algebra to Represent and Accelerate RTL Simulation (Extended Version)
Yan Zhu, Boru Chen, Christopher W. Fletcher +1
RTL simulation on CPUs remains a persistent bottleneck in hardware design. State-of-the-art simulators embed the circuit directly into the simulation binary, resulting in long comp…
cs.AR2011★ 1 cited
HMTT: A Hybrid Hardware/Software Tracing System for Bridging Memory Trace's Semantic Gap
Yungang Bao, Jinyong Zhang, Yan Zhu +4
Memory trace analysis is an important technology for architecture research, system software (i.e., OS, compiler) optimization, and application performance improvements. Hardware-sn…