2 papers
cs.CR2026
Emulation-based System-on-Chip Security Verification: Challenges and Opportunities
Tanvir Rahman, Shuvagata Saha, Ahmed Y. Alhurubi +3
Increasing system-on-chip (SoC) heterogeneity, deep hardware/software integration, and the proliferation of third-party intellectual property (IP) have brought security validation…
cs.AR2025
VerilogDB: The Largest, Highest-Quality Dataset with a Preprocessing Framework for LLM-based RTL Generation
Paul E. Calzada, Zahin Ibnat, Tanvir Rahman +5
Large Language Models (LLMs) are gaining popularity for hardware design automation, particularly through Register Transfer Level (RTL) code generation. In this work, we examine the…