4 papers
The Illusion of Equivalence: Systematic FP16 Divergence in KV-Cached Autoregressive Inference
Ranjith Chodavarapu, Lei Xu
KV caching is a ubiquitous optimization in autoregressive transformer inference, long presumed to be numerically equivalent to cache-free computation. This assumption fails under s…
SoberDSE: Sample-Efficient Design Space Exploration via Learning-Based Algorithm Selection
Lei Xu, Shanshan Wang, Chenglong Xiao
High-Level Synthesis (HLS) is a pivotal electronic design automation (EDA) technology that enables the generation of hardware circuits from high-level language descriptions. A crit…
MPM-LLM4DSE: Reaching the Pareto Frontier in HLS with Multimodal Learning and LLM-Driven Exploration
Lei Xu, Shanshan Wang, Chenglong Xiao
High-Level Synthesis (HLS) design space exploration (DSE) seeks Pareto-optimal designs within expansive pragma configuration spaces. To accelerate HLS DSE, graph neural networks (G…
Intelligent4DSE: Optimizing High-Level Synthesis Design Space Exploration with Graph Neural Networks and Large Language Models
Lei Xu, Shanshan Wang, Emmanuel Casseau +1
High-Level Synthesis (HLS) Design Space Exploration (DSE) is essential for generating hardware designs that balance performance, power, and area (PPA). To optimize this process, ex…