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cs.NI2023★ 2 cited
Inverting the SerDes Link Design Flow Process
Michael J. Degerstrom, Chad M. Smutzer, Patrick J. Zabinski +1
The traditional SerDes link simulation process begins with the extraction of printed circuit board (PCB) physical stripline and via models, followed by channel modeling and link si…
cs.NI2023★ 1 cited
56 Gbps PCB Design Strategies for Clean, Low-Skew Channels
Michael J. Degerstrom, Chad M. Smutzer, Barry K. Gilbert +1
Although next generation (>28 Gbps) SerDes standards have been contemplated for several years, it has not been clear whether PCB structures supporting 56 Gbps NRZ will be feasible…