collaborators

5 papers

cs.AR2026

ChatHLS: Towards Systematic Design Automation and Optimization for High-Level Synthesis

Runkai Li, Jia Xiong, Xiuyuan He +5

High-Level Synthesis (HLS) improves IC development productivity by enabling hardware design from C-like languages. However, strict coding constraints and design-specific optimizati…

cs.LG2025

Revolution or Hype? Seeking the Limits of Large Models in Hardware Design

Qiang Xu, Leon Stok, Rolf Drechsler +3

Recent breakthroughs in Large Language Models (LLMs) and Large Circuit Models (LCMs) have sparked excitement across the electronic design automation (EDA) community, promising a re…

cs.CR2025

Red Teaming Methodology for Design Obfuscation

Yuntao Liu, Abir Akib, Zelin Lu +5

The main goal of design obfuscation schemes is to protect sensitive design details from untrusted parties in the VLSI supply chain, including but not limited to off-shore foundries…

cs.AR2025

ForgeHLS: A Large-Scale, Open-Source Dataset for High-Level Synthesis

Zedong Peng, Zeju Li, Mingzhe Gao +3

High-Level Synthesis (HLS) plays a crucial role in modern hardware design by transforming high-level code into optimized hardware implementations. However, progress in applying mac…

cs.AR2025

FIXME: Towards End-to-End Benchmarking of LLM-Aided Design Verification

Gwok-Waa Wan, Shengchu Su, Ruihu Wang +15

Despite the transformative potential of Large Language Models (LLMs) in hardware design, a comprehensive evaluation of their capabilities in design verification remains underexplor…