4 citations · 6 across the 5 of their papers we have counts for
5 papers
Wrapper/TAM Co-Optimization and constrained Test Scheduling for SOCs Using Rectangle Bin Packing
Hafiz Md. Hasan Babu, Md. Rafiqul Islam, Muhammad Rezaul Karim +2
This paper describes an integrated framework for SOC test automation. This framework is based on a new approach for Wrapper/TAM co-optimization based on rectangle packing consideri…
Wrapper/TAM Co-Optimization and Test Scheduling for SOCs Using Rectangle Bin Packing Considering Diagonal Length of Rectangles
Md. Rafiqul Islam, Muhammad Rezaul Karim, Abdullah Al Mahmud +2
This paper describes an integrated framework for SOC test automation. This framework is based on a new approach for Wrapper/TAM co-optimization based on rectangle packing consideri…
Sorting Network for Reversible Logic Synthesis
Md. Saiful Islam, Md. Rafiqul Islam, Abdullah Al Mahmud +1
In this paper, we have introduced an algorithm to implement a sorting network for reversible logic synthesis based on swapping bit strings. The algorithm first constructs a network…
Building Toffoli Network for Reversible Logic Synthesis Based on Swapping Bit Strings
Hafiz Md. Hasaan Babu, Md. Saiful Islam, Md. Rafiqul Islam +4
In this paper, we have implemented and designed a sorting network for reversible logic circuits synthesis in terms of n*n Toffoli gates. The algorithm presented in this paper const…
Efficient Wrapper/TAM Co-Optimization for SOC Using Rectangle Packing
Md. Rafiqul Islam, Muhammad Rezaul Karim, Abdullah Al Mahmud +2
The testing time for a system-on-chip(SOC) largely depends on the design of test wrappers and the test access mechanism(TAM).Wrapper/TAM co-optimization is therefore necessary to m…