7 papers
PVAC: A RowHammer Mitigation Architecture Exploiting Per-victim-row Counting
Jumin Kim, Seungmin Baek, Hwayong Nam +3
As DRAM scaling exacerbates RowHammer, DDR5 introduces per-row activation counting (PRAC) to track aggressor activity. However, PRAC indiscriminately increments counters on every a…
Rethinking LLM Inference Bottlenecks: Insights from Latent Attention and Mixture-of-Experts
Sungmin Yun, Seonyong Park, Hwayong Nam +10
Computational workloads composing traditional transformer models are starkly bifurcated. Multi-Head Attention (MHA) and Grouped-Query Attention are memory-bound due to low arithmet…
RoMe: Row Granularity Access Memory System for Large Language Models
Hwayong Nam, Seungmin Baek, Jumin Kim +2
Modern HBM-based memory systems have evolved over generations while retaining cache line granularity accesses. Preserving this fine granularity necessitated the introduction of ban…
SoK: Systematizing a Decade of Architectural RowHammer Defenses Through the Lens of Streaming Algorithms
Michael Jaemin Kim, Seungmin Baek, Jumin Kim +3
A decade after its academic introduction, RowHammer (RH) remains a moving target that continues to challenge both the industry and academia. With its potential to serve as a critic…
Per-Row Activation Counting on Real Hardware: Demystifying Performance Overheads
Jumin Kim, Seungmin Baek, Minbok Wi +5
Per-Row Activation Counting (PRAC), a DRAM read disturbance mitigation method, modifies key DRAM timing parameters, reportedly causing significant performance overheads in simulato…
Sudoku: Decomposing DRAM Address Mapping into Component Functions
Minbok Wi, Seungmin Baek, Seonyong Park +2
Decomposing DRAM address mappings into component-level functions is critical for understanding memory behavior and enabling precise RowHammer attacks, yet existing reverse-engineer…