4 papers
An evaluation of a microprocessor with two independent hardware execution threads coupled through a shared cache
Madhav P. Desai
We investigate the utility of augmenting a microprocessor with a single execution pipeline by adding a second copy of the execution pipeline in parallel with the existing one. The…
Generalized cofactors and decomposition of Boolean satisfiability problems
Madhav Desai, Virendra Sule
We propose an approach for decomposing Boolean satisfiability problems while extending recent results of \cite{sul2} on solving Boolean systems of equations. Developments in \cite{…
Inner Loop Optimizations in Mapping Single Threaded Programs to Hardware
Madhav Desai
In the context of mapping high-level algorithms to hardware, we consider the basic problem of generating an efficient hardware implementation of a single threaded program, in parti…
Optimization of Discrete-parameter Multiprocessor Systems using a Novel Ergodic Interpolation Technique
Neha V. Karanjkar, Madhav P. Desai
Modern multi-core systems have a large number of design parameters, most of which are discrete-valued, and this number is likely to keep increasing as chip complexity rises. Furthe…