3d ic design 1architectural simulation 1cache modeling 1performance evaluation 1power modeling 1thermal-aware floorplanning 1
From the 1 of 5 linked papers with an AI index.
Showing cs.ARShow all
2 papers · 1 filter
cs.AR2026
CLIP-3D: Closed-Loop Evaluation of Performance and Physical Constraints for 3D ICs
Shuo Ren, Libo Shen, Yaohui Han +6
The paper introduces CLIP-3D, a methodology that integrates power, cache, and thermal models with architectural simulation to evaluate the performance and physical constraints of 3…
cs.AR2026
Chiplet3D: Pin- and Thermal-Aware 3D Chiplet Floorplanning via Convolution-Embedded MILP
Shuo Ren, Libo Shen, Yaohui Han +4
As traditional Moore's Law scaling slows down, 3D-ICs stack multiple active dies vertically to sustain performance scaling. However, this vertical stacking traps heat inside, makin…