1 citations · 1 across the 3 of their papers we have counts for
3 papers
cs.ET2026
Beyond HBM-on-GPU: Thermal Design Envelope for 3D Volumetric DRAM-on-GPU Integration
Yukai Chen, Melina Lofrano, Khakim Akhunov +12
The scaling of GPUs for AI and HPC workloads is increasingly constrained by the capacity, bandwidth, and thermal limits of both 2.5D HBM-GPU and direct-stacked 3D HBM-on-GPU integr…
cs.AR2023★ 1 cited
Impact of gate-level clustering on automated system partitioning of 3D-ICs
Quentin Delhaye, Eric Beyne, Joël Goossens +2
When partitioning gate-level netlists using graphs, it is beneficial to cluster gates to reduce the order of the graph and preserve some characteristics of the circuit that the par…
cs.PF2007
Simulation Methodology for Analysis of Substrate Noise Impact on Analog / RF Circuits Including Interconnect Resistance
C. Soens, G. Van Der Plas, P. Wambacq +1
This paper reports a novel simulation methodology for analysis and prediction of substrate noise impact on analog / RF circuits taking into account the role of the parasitic resist…