activity
20242026
collaborators

5 papers

cs.AR2026

TimingLLM: A Two-Stage Retrieval-Augmented Framework for Pre-Synthesis Timing Prediction from Verilog

Armin Abdollahi, Negin Ashrafi, Mehdi Kamal +1

Early, tool-free prediction of post-synthesis timing remains a key obstacle to rapid RTL iteration. We introduce TimingLLM, a two-stage retrieval-augmented LLM pipeline that estima…

cs.AR2026

HDLFORGE: A Two-Stage Multi-Agent Framework for Efficient Verilog Code Generation with Adaptive Model Escalation

Armin Abdollahi, Saeid Shokoufa, Negin Ashrafi +2

We present HDLFORGE, a two-stage multi-agent framework for automated Verilog generation that optimizes the trade-off between generation speed and accuracy. The system uses a compac…

cs.LG2025

RocketPPA: Code-Level Power, Performance, and Area Prediction via LLM and Mixture of Experts

Armin Abdollahi, Mehdi Kamal, Massoud Pedram

This paper presents RocketPPA, a novel ultra-fast power, performance (delay), and area (PPA) estimator operating directly at the code-level abstraction using HDL code as input. The…

cs.AR2025

IC-D2S: A Hybrid Ising-Classical-Machines Data-Driven QUBO Solver Method

Armin Abdollahi, Mehdi Kamal, Massoud Pedram

We present a heuristic algorithm designed to solve Quadratic Unconstrained Binary Optimization (QUBO) problems efficiently. The algorithm, referred to as IC-D2S, leverages a hybrid…

cs.AR2024

MENAGE: Mixed-Signal Event-Driven Neuromorphic Accelerator for Edge Applications

Armin Abdollahi, Mehdi Kamal, Massoud Pedram

This paper presents a mixed-signal neuromorphic accelerator architecture designed for accelerating inference with event-based neural network models. This fully CMOS-compatible acce…