2 papers
cs.LG2026
AutoPPA: Automated Circuit PPA Optimization via Contrastive Code-based Rule Library Learning
Chongxiao Li, Pengwei Jin, Di Huang +14
Performance, power, and area (PPA) optimization is a fundamental task in RTL design, requiring a precise understanding of circuit functionality and the relationship between circuit…
cs.LG2025
RealBench: Benchmarking Verilog Generation Models with Real-World IP Designs
Pengwei Jin, Di Huang, Chongxiao Li +10
The automatic generation of Verilog code using Large Language Models (LLMs) has garnered significant interest in hardware design automation. However, existing benchmarks for evalua…