2 citations · 2 across the 1 of their papers we have counts for
2 papers
cs.LO2026
Formal Reasoning about Performance Models
Moussa Labbadi, Rupak Majumdar, V. R. Sathiyanarayana +1
Discrete-event simulation is a standard technique for modelling and analysing the performance of computer systems, networks, and services. Although simulation tools are widely used…
cs.PL2023★ 2 cited
Positive Almost-Sure Termination -- Complexity and Proof Rules
Rupak Majumdar, V. R. Sathiyanarayana
We study the recursion-theoretic complexity of Positive Almost-Sure Termination () in an imperative programming language with rational variables, bounded nondetermin…