3 papers
cs.AR2026
Autoformalizing Memory Specifications with Agents
Jan Ole Ernst, Dmitri Michelangelo Saberi, Derek Christ +6
The primary goal of Design Verification (DV) is to ensure that a proposed chip design implementation (either in code, or physical form) exactly matches its specification and is fre…
cs.AR2026
DRAMPyML: A Formal Description of DRAM Protocols with Timed Petri Nets
Derek Christ, Thomas Zimmermann, Philippe Barbie +3
The JEDEC committee defines various domain-specific DRAM standards. These standards feature increasingly complex and evolving protocol specifications, which are detailed in timing…
cs.AR2025
Architecture, Simulation and Software Stack to Support Post-CMOS Accelerators: The ARCHYTAS Project
Giovanni Agosta, Stefano Cherubin, Derek Christ +11
ARCHYTAS aims to design and evaluate non-conventional hardware accelerators, in particular, optoelectronic, volatile and non-volatile processing-in-memory, and neuromorphic, to tac…