51 citations · 55 across the 4 of their papers we have counts for
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cs.AR2024
Improving the Representativeness of Simulation Intervals for the Cache Memory System
Nicolas Bueno, Fernando Castro, Luis Pinuel +2
Accurate simulation techniques are indispensable to efficiently propose new memory or architectural organizations. As implementing new hardware concepts in real systems is often no…
cs.AR2024★ 4 cited
Reuse Detector: Improving the Management of STT-RAM SLLCs
Roberto RodrÍguez-RodrÍguez, Javier DÍaz, Fernando Castro +8
Various constraints of Static Random Access Memory (SRAM) are leading to consider new memory technologies as candidates for building on-chip shared last-level caches (SLLCs). Spin-…