2 papers
cs.AR2026
REPTILES: Repeated Tiles of Sargantana, a RISC-V multicore based on OpenPiton
Noelia Oliete-EscuÃn, Arnau Bigas, NarcÃs Rodas +26
Chip industry continues advancing and expanding modern computing systems, resulting in more complex multi-core processors. Conversely, academic projects face scalability challenges…
cs.AR2024
Hypervisor Extension for a RISC-V Processor
Jaume Gauchola, JuanJosé Costa, Enric Morancho +8
This paper describes our experience implementing a Hypervisor extension for a 64-bit RISC-V processor. We describe the design process and the main required parts with a brief expla…