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20242026
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cs.AR2025

Optimizing Coverage-Driven Verification Using Machine Learning and PyUVM: A Novel Approach

Suruchi Kumari, Deepak Narayan Gadde, Aman Kumar

The escalating complexity of System-on-Chip (SoC) designs has created a bottleneck in verification, with traditional techniques struggling to achieve complete coverage. Existing te…

cs.AR2024

Verifying Non-friendly Formal Verification Designs: Can We Start Earlier?

Bryan Olmos, Daniel Gerl, Aman Kumar +1

The design of Systems on Chips (SoCs) is becoming more and more complex due to technological advancements. Missed bugs can cause drastic failures in safety-critical environments le…

cs.AR2024

FuzzWiz -- Fuzzing Framework for Efficient Hardware Coverage

Deepak Narayan Gadde, Aman Kumar, Djones Lettnin +1

Ever-increasing design complexity of System-on-Chips (SoCs) led to significant verification challenges. Unlike software, bugs in hardware design are vigorous and eternal i.e., once…

cs.AR2024

Towards Efficient Design Verification -- Constrained Random Verification using PyUVM

Deepak Narayan Gadde, Suruchi Kumari, Aman Kumar

Python, as a multi-paradigm language known for its ease of integration with other languages, has gained significant attention among verification engineers recently. A Python-based…

cs.AR2024

Effective Design Verification -- Constrained Random with Python and Cocotb

Deepak Narayan Gadde, Suruchi Kumari, Aman Kumar

Being the most widely used language across the world due to its simplicity and with 35 keywords (v3.7), Python attracts both hardware and software engineers. Python-based verificat…