7 papers
Knowledge Graphs, the Missing Link in Agentic AI-based Formal Verification
Vaisakh Naduvodi Viswambharan, Keerthan Kopparam Radhakrishna, Deepak Narayan Gadde +1
Recent advances in Large Language Models (LLMs) have enabled workflows that generate SystemVerilog Assertions (SVAs) from natural-language specifications, with the potential to acc…
Agentic AI-based Coverage Closure for Formal Verification
Sivaram Pothireddypalli, Ashish Raman, Deepak Narayan Gadde +1
Coverage closure is a critical requirement in Integrated Chip (IC) development process and key metric for verification sign-off. However, traditional exhaustive approaches often fa…
Saarthi for AGI: Towards Domain-Specific General Intelligence for Formal Verification
Aman Kumar, Deepak Narayan Gadde, Luu Danh Minh +3
Saarthi is an agentic AI framework that uses multi-agent collaboration to perform end-to-end formal verification. Even though the framework provides a complete flow from specificat…
Formal that "Floats" High: Formal Verification of Floating Point Arithmetic
Hansa Mohanty, Vaisakh Naduvodi Viswambharan, Deepak Narayan Gadde
Formal verification of floating-point arithmetic remains challenging due to non-linear arithmetic behavior and the tight coupling between control and datapath logic. Existing appro…
Hey AI, Generate Me a Hardware Code! Agentic AI-based Hardware Design & Verification
Deepak Narayan Gadde, Keerthan Kopparam Radhakrishna, Vaisakh Naduvodi Viswambharan +4
Modern Integrated Circuits (ICs) are becoming increasingly complex, and so is their development process. Hardware design verification entails a methodical and disciplined approach…
Saarthi: The First AI Formal Verification Engineer
Aman Kumar, Deepak Narayan Gadde, Keerthan Kopparam Radhakrishna +1
Recently, Devin has made a significant buzz in the Artificial Intelligence (AI) community as the world's first fully autonomous AI software engineer, capable of independently devel…