3 papers
cs.DC2024
Parallel AIG Refactoring via Conflict Breaking
Ye Cai, Zonglin Yang, Liwei Ni +3
Algorithm parallelization to leverage multi-core platforms for improving the efficiency of Electronic Design Automation~(EDA) tools plays a significant role in enhancing the scalab…
cs.DC2024
Enhancing ASIC Technology Mapping via Parallel Supergate Computing
Ye Cai, Zonglin Yang, Liwei Ni +2
With the development of large-scale integrated circuits, electronic design automation~(EDA) tools are increasingly emphasizing efficiency, with parallel algorithms becoming a trend…
cs.AI2023
Adaptive Reconvergence-driven AIG Rewriting via Strategy Learning
Liwei Ni, Zonglin Yang, Jiaxi Zhang +4
Rewriting is a common procedure in logic synthesis aimed at improving the performance, power, and area (PPA) of circuits. The traditional reconvergence-driven And-Inverter Graph (A…