7 citations · 8 across the 2 of their papers we have counts for
3 papers
SUSpMV: A High Frequency Sparse Matrix Vector Multiplier on HBM Enabled FPGA written in SUS
Lennart Van Hirtum, David Volz, Andreas Koch +1
SUSpMV is a Sparse Matrix Vector multiplication (SpMV) accelerator written in the upcoming HDL SUS. By leveraging SUS's unique latency counting and inference mechanism, SUSpMV coul…
Solving systems of equations on antichains for the computation of the ninth Dedekind Number
Patrick De Causmaecker, Lennart Van Hirtum
We study systems of equations on antichains, together with a way to count the number of solutions. We start with a simple example, generalise and show more applications. One of the…
A computation of D(9) using FPGA Supercomputing
Lennart Van Hirtum, Patrick De Causmaecker, Jens Goemaere +4
This preprint makes the claim of having computed the Dedekind Number. This was done by building an efficient FPGA Accelerator for the core operation of the process, and pa…