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Akshada Khele

1 paper hereh-index 11 citations1 works total

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  • middle author1

Across the 1 of 1 paper where every author was matched, so the position is known.

fields
  • eess.SY1

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collaborators

1 paper

eess.SY2024

Design of Phase Locked Loop in 180 nm Technology

Priyam Kumar, Akshada Khele, Aditee C. Joshi

The presented paper introduces a design for a phase-locked loop (PLL) that is utilized in frequency synthesis and modulation-demodulation within communication systems and in VLSI a…

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Not affiliated with arXiv. Researcher data from Semantic Scholar (ODC-BY) and OpenAlex.