2 citations · 4 across the 2 of their papers we have counts for
5 papers
Hierarchical Decoupling Capacitor Optimization for Power Distribution Network of 2.5D ICs with Co-Analysis of Frequency and Time Domains Based on Deep Reinforcement Learning
Yuanyuan Duan, Haiyang Feng, Zhiping Yu +3
With the growing need for higher memory bandwidth and computation density, 2.5D design, which involves integrating multiple chiplets onto an interposer, emerges as a promising solu…
Chiplet Placement Order Exploration Based on Learning to Rank with Graph Representation
Zhihui Deng, Yuanyuan Duan, Leilai Shao +1
Chiplet-based systems, integrating various silicon dies manufactured at different integrated circuit technology nodes on a carrier interposer, have garnered significant attention i…
Late Breaking Results: Fast System Technology Co-Optimization Framework for Emerging Technology Based on Graph Neural Networks
Tianliang Ma, Guangxi Fan, Xuguang Sun +3
This paper proposes a fast system technology co-optimization (STCO) framework that optimizes power, performance, and area (PPA) for next-generation IC design, addressing the challe…
RLPlanner: Reinforcement Learning based Floorplanning for Chiplets with Fast Thermal Analysis
Yuanyuan Duan, Xingchen Liu, Zhiping Yu +3
Chiplet-based systems have gained significant attention in recent years due to their low cost and competitive performance. As the complexity and compactness of a chiplet-based syst…
Fast Cell Library Characterization for Design Technology Co-Optimization Based on Graph Neural Networks
Tianliang Ma, Guangxi Fan, Zhihui Deng +3
Design technology co-optimization (DTCO) plays a critical role in achieving optimal power, performance, and area (PPA) for advanced semiconductor process development. Cell library…