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researcher

Jaeduk Han

2 papers hereh-index 13637 citations70 works total

Matching runs newest-first, so older work may not be attached to this profile yet.

author position
  • last author2

Across the 2 of 2 papers where every author was matched, so the position is known.

fields
  • cs.AR1
  • eess.SP1
same name
  • Jaeduk Han — 1 paper, h 1

Either other researchers who publish under this name, or the same person where the external sources have not merged their records.

identity via Semantic Scholar / OpenAlex

most citedA Custom IC Layout Generation Engine Based on Dynamic Templates and Grids

15 citations · 15 across the 2 of their papers we have counts for

collaborators

2 papers

cs.AR2024

Interactive and Automatic Generation of Primitive Custom Circuit Layout Using LLMs

Geunyoung You, Youjin Byun, Sojin Lim +1

In this study, we investigate the use of Large Language Models (LLMs) for the interactive and automated production of customs circuit layouts described in natural language. Our pro…

eess.SP2022★ 15 cited

A Custom IC Layout Generation Engine Based on Dynamic Templates and Grids

Taeho Shin, Dongjun Lee, Dongwhee Kim +5

This paper presents an automatic layout generation framework in advanced CMOS technologies. The framework extends the template-and-grid-based layout generation methodology with the…

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