2 papers
cs.AR2026
A Survey on LLM-Integrated Hardware Design Verification
Hao Zheng, Jaime Rafael Imperial, Bardia Nadimi +1
Large language models (LLMs) are increasingly being integrated into hardware verification to automate specification interpretation, verification-artifact generation, debugging, for…
cs.AI2026
SpecAlign: A Semantic Alignment Framework for SystemVerilog Assertion Generation
Jaime Rafael Imperial, Hao Zheng
Existing Large Language Model (LLM) approaches to SystemVerilog Assertion (SVA) generation primarily focus on syntactic validity and formal verification outcomes, while semantic al…