3 papers
cs.AR2026
GPU-Accelerated Gate-Level Time-Based Power Analysis via Event-Density-Aware Partitioning and Kernel Fusion
Weihao Wang, Yikang Ouyang, Hongyuan Liu +1
Power analysis is crucial in modern chip design flow. Particularly, time-based power analysis can provide fine-grained power consumption information to facilitate the diagnosis of…
cs.AR2026
Retrieve, Schedule, Reflect: LLM Agents for Chip QoR Optimization
Yikang Ouyang, Yang Luo, Dongsheng Zuo +1
Modern chip design requires multi-objective optimization of timing, power, and area under stringent time-to-market constraints. Although powerful optimization algorithms are integr…
cs.AR2024
RL-MUL 2.0: Multiplier Design Optimization with Parallel Deep Reinforcement Learning and Space Reduction
Dongsheng Zuo, Jiadong Zhu, Yikang Ouyang +1
Multiplication is a fundamental operation in many applications, and multipliers are widely adopted in various circuits. However, optimizing multipliers is challenging due to the ex…