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20232026
most citedExperimental Validation of Memristor-Aided Logic Using 1T1R TaOx RRAM Crossbar Array

1 citations · 2 across the 6 of their papers we have counts for

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cs.ET2026

OTTER - Two Transistor - One RRAM Architecture for Reliable In-Memory-Computing in 28 nm CMOS Technology

Yang Chen, Daniele Storelli, Xinyi Zhao +20

This work presents OTTER, a 28 nm CMOS platform co-integrated with TaOx-based valence-change mechanism (VCM) RRAM, demonstrating a two-transistor-one-memristive-device (2T1R) archi…

cs.ET2024

In-Memory Mirroring: Cloning Without Reading

Simranjeet Singh, Ankit Bende, Chandan Kumar Jha +4

In-memory computing (IMC) has gained significant attention recently as it attempts to reduce the impact of memory bottlenecks. Numerous schemes for digital IMC are presented in the…

cs.ET2023★ 1 cited

Experimental Validation of Memristor-Aided Logic Using 1T1R TaOx RRAM Crossbar Array

Ankit Bende, Simranjeet Singh, Chandan Kumar Jha +10

Memristor-aided logic (MAGIC) design style holds a high promise for realizing digital logic-in-memory functionality. The ability to implement a specific gate in a MAGIC design styl…

cs.ET2023★ 1 cited

MemSPICE: Automated Simulation and Energy Estimation Framework for MAGIC-Based Logic-in-Memory

Simranjeet Singh, Chandan Kumar Jha, Ankit Bende +4

Existing logic-in-memory (LiM) research is limited to generating mappings and micro-operations. In this paper, we present~\emph{MemSPICE}, a novel framework that addresses this gap…

cs.ET2023

Should We Even Optimize for Execution Energy? Rethinking Mapping for MAGIC Design Style

Simranjeet Singh, Chandan Kumar Jha, Ankit Bende +5

Memristor-based logic-in-memory (LiM) has become popular as a means to overcome the von Neumann bottleneck in traditional data-intensive computing. Recently, the memristor-aided lo…