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20242026
most citedHarmChip: Evaluating Hardware Security Centric LLM Safety via Jailbreak Benchmarking

1 citations · 1 across the 15 of their papers we have counts for

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cs.CR2026

Hardware Design and Security in the Era of Chiplets and LLMs

Johann Knechtel, Ozgur Sinanoglu, Paul V. Gratz +1

The semiconductor industry is undergoing a dual revolution: the shift toward heterogeneous 2.5D chiplet systems and the integration of Large Language Models (LLMs) into Electronic…

cs.CR2026

Security Analysis for SCONE Logic Locking

Akashdeep Saha, Mohammed Nabeel, Johann Knechtel +2

SCONE [DAC'25] expands a logic locking interface with additional encoded inputs derived from the original primary inputs, and admits two realizations: a \textit{with-ES} variant, w…

cs.CR2026

TrojanGYM: A Detector-in-the-Loop LLM for Adaptive RTL Hardware Trojan Insertion

Saideep Sreekumar, Zeng Wang, Akashdeep Saha +6

Hardware Trojans (HTs) remain a critical threat because learning-based detectors often overfit to narrow trigger/payload patterns and small, stylized benchmarks. We introduce Troja…

cs.CR2026

2.5D Root of Trust: Securing the Chiplet Ecosystem

Charles Williams, Mohammed Nabeel, Gino Chacon +3

The semiconductor industry is rapidly transitioning from monolithic systems-on-chip toward heterogeneous, multi-vendor 2.5D chiplet ecosystems integrated via silicon interposers. W…

cs.CR2026

LLMs for Secure Hardware Design and Related Problems: Opportunities and Challenges

Johann Knechtel, Ozgur Sinanoglu, Ramesh Karri

The integration of Large Language Models (LLMs) into Electronic Design Automation (EDA) and hardware security is rapidly reshaping the semiconductor industry. While LLMs offer unpr…

cs.CR20261 cited

HarmChip: Evaluating Hardware Security Centric LLM Safety via Jailbreak Benchmarking

Zeng Wang, Minghao Shao, Weimin Fu +6

The integration of large language models (LLMs) into electronic design automation (EDA) workflows has introduced powerful capabilities for RTL generation, verification, and design…