2 papers
cs.AR2026
CPPL: A Circuit Prompt Programming Language
Shuo Yin, Yihe Wang, Lancheng Zou +6
Large language models (LLMs) have shown promise in register-transfer level (RTL) design automation, but direct RTL generation remains difficult to validate, optimize, and integrate…
cs.AR2026
PipeRTL: Timing-Aware Pipeline Optimization at IR-Level for RTL Generation
Shuo Yin, Fangzhou Liu, Lancheng Zou +6
Modern hardware compilers increasingly rely on rich intermediate representations (IRs) to preserve optimization-relevant semantics before generating RTL code. However, one importan…