activity
20142026
most citedA Python-based Mixed Discrete-Continuous Simulation Framework for Digital Twins

1 citations · 1 across the 6 of their papers we have counts for

collaborators

6 papers

cs.AI2026

SupplyNetPy: An Open-Source Python Library for High-Fidelity Modeling and Simulation of Arbitrary Supply Chain and Inventory Networks

Tushar Lone, Neha Karanjkar

This paper introduces SupplyNetPy, an open-source, well-documented Python library for modeling and discrete-event simulation of supply chain networks with arbitrary multi-echelon s…

cs.LG2026

On the Potential of Graph Neural Networks as Metamodels for Supply Chain Optimization: Dataset, Architectures, and Directions

Tushar Lone, Neha Karanjkar

Graph Neural Networks (GNNs) have emerged as a powerful, differentiable class of learning models for graph-structured systems. Their ability to generalize across topologies opens t…

eess.SY2026

On Integrating Resilience and Human Oversight into LLM-Assisted Modeling Workflows for Digital Twins

Lekshmi P, Neha Karanjkar

LLM-assisted modeling holds the potential to rapidly build executable Digital Twins of complex systems from only coarse descriptions and sensor data. However, resilience to LLM hal…

eess.SY2022★ 1 cited

A Python-based Mixed Discrete-Continuous Simulation Framework for Digital Twins

Neha Karanjkar, Subodh M. Joshi

The use of Digital Twins is set to transform the manufacturing sector by aiding monitoring and real-time decision making. For several applications in this sector, the system to be…

cs.PF2016

On Continuous-space Embedding of Discrete-parameter Queueing Systems

Neha Karanjkar, Madhav P. Desai, Shalabh Bhatnagar

Motivated by the problem of discrete-parameter simulation optimization (DPSO) of queueing systems, we consider the problem of embedding the discrete parameter space into a continuo…

cs.DC2014

Optimization of Discrete-parameter Multiprocessor Systems using a Novel Ergodic Interpolation Technique

Neha V. Karanjkar, Madhav P. Desai

Modern multi-core systems have a large number of design parameters, most of which are discrete-valued, and this number is likely to keep increasing as chip complexity rises. Furthe…