5 papers · 1 filter
Routing Dense Layouts with History-Aware Offline Reinforcement Learning using LSTM
Afsara Khan, Austin Rovinski
Detailed routing remains a dominant runtime bottleneck in physical design due to increasing complexity of design rules. Modern routers can struggle to resolve persistent violations…
Revisiting Hardware Priority Queue Architectures
Qihang Wu, Austin Rovinski
Priority queues - data structures that serve elements based on priority rather than insertion order - are fundamental in a wide range of applications, including operating systems,…
ORRAM: An OpenROAD-Integrated RAM Generator Using Standard Cells
Brayden Louie, Thinh P. Nguyen, Matt Liberty +1
Memory inference remains a significant challenge in turnkey ASIC design flows. Inferring flip-flops from RTL can create thousands of densely interconnected instances which dramatic…
CLIPGen: A Chiplet Link IP Modeling and Generation Framework for 2.5D Architecture Exploration
Zhengping Zhu, Austin Rovinski
Advanced 2.5D Systems-in-Package (SiPs) compose a growing portion of high-performance systems. While the packaging and interconnect choices play a large role in the overall system…
Accelerating Detailed Routing Convergence through Offline Reinforcement Learning
Afsara Khan, Austin Rovinski
Detailed routing remains one of the most complex and time-consuming steps in modern physical design due to the challenges posed by shrinking feature sizes and stricter design rules…