3 papers
cs.LG2026
Finding the Needle in a Haystack: Test-Time Analog Circuit Representation Adaptation for Bayesian Optimization
Fin Amin, Sounak Dutta, Paul D. Franzon
Bayesian optimization (BO) is a sample-efficient framework for analog circuit topology search, where evaluating each candidate topology can require costly simulation. However, repr…
cs.LG2024
Can Low-Rank Knowledge Distillation in LLMs be Useful for Microelectronic Reasoning?
Nirjhor Rouf, Fin Amin, Paul D. Franzon
In this work, we present empirical results regarding the feasibility of using offline large language models (LLMs) in the context of electronic design automation (EDA). The goal is…
cs.LG2024
Addressing Large Action Spaces in 3D Floorplanning via Spatial Generalization
Fin Amin, Nirjhor Rouf, Tse-Han Pan +3
Many recent machine learning approaches to floorplanning represent placement decisions using discrete canvas coordinates, which creates scalability bottlenecks as the action space…