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cs.AR2026
Dryas: A Reprogrammable Engine for High-Speed Interconnect Tracing and Analysis
Manuel Bröchin, Tom Kuchler, Michael Giardino +2
The proliferation of heterogeneous components in modern computing systems has been accompanied by new higher bandwidth and lower latency interconnects. These interfaces and protoco…
cs.AR2022★ 1 cited
ECI: a Customizable Cache Coherency Stack for Hybrid FPGA-CPU Architectures
Abishek Ramdas, Michael Giardino, Runbin Shi +4
Unlike other accelerators, FPGAs are capable of supporting cache coherency, thereby turning them into a more powerful architectural option than just a peripheral accelerator. Howev…