3 papers
cs.LG2026
PPAPlace: Differentiable Cross-Stage Objectives for Chip Placement Optimization
Ruogu Chen, Jie Han
Macro placement significantly affects a chip's post-route performance, power, and area (PPA). Most placement methods optimize half-perimeter wirelength (HPWL) as the primary object…
cs.SD2026
CODA: Cascaded Online Discontinuity-Aware Alignment for Real-Time Image-Based Score Following
Yining Yang, Ruogu Chen, Jie Han
Real-time score following from sheet images remains chal- lenging because the model must process streaming au- dio while resolving highly repetitive visual patterns un- der strict…
cs.LG2026
CoEvoP&R: Co-Evolving Placement Objectives with Routing Feedback via Large Language Models
Ruogu Chen, Weihua Xiao, Ramesh Karri +1
Analytical placers rely on differentiable objective functions to guide placement, typically combining intermediate surrogate metrics such as half-perimeter wirelength (HPWL) and ce…