works on

From the 2 of 8 linked papers with an AI index.

collaborators

8 papers

cs.AR2026

SynAct: A Reasoning-Acting Large Language Model Agent for Adaptive Synthesis Optimization

Fangzhou Liu, Peiyi Han, Jiawei Liu +5

Logic synthesis transforms RTL designs into gate-level netlists, where PPA results are highly sensitive to the choice of optimization commands, making synthesis tuning both high-di…

cs.AI2026

AgenticECO: An Agentic Framework for ECO on 3D Integrated Circuits

Shuo Ren, Yaohui Han, Libo Shen +4

As Moore's law slows, the industry is turning to three-dimensional integration; yet in merged 3D-IC flows, routed designs expose bond-level defects with no 2D analogue, and post-ro…

cs.AR2026

Differentiable Routability-Driven Package Floorplanning with Pin Assignment

Yiqi Huang, Zepeng Li, Zhen Zhuang +3

The paper introduces a differentiable optimization framework for package floorplanning and pin assignment that directly models chip orientations and fan‑out congestion, achieving f…

cs.AR2026

CLIP-3D: Closed-Loop Evaluation of Performance and Physical Constraints for 3D ICs

Shuo Ren, Libo Shen, Yaohui Han +6

The paper introduces CLIP-3D, a methodology that integrates power, cache, and thermal models with architectural simulation to evaluate the performance and physical constraints of 3…

cs.AI2026

AgenticPD: A Stage-Aware Agentic Framework for Physical Design QoR Optimization

Shuo Ren, Zijin Cheng, Yaohui Han +7

Physical design quality-of-results~(QoR) optimization is hard and expensive. Choices made at one stage can help or hurt later stages. Each evaluation requires a costly EDA run thro…

cs.AR2026

Chiplet3D: Pin- and Thermal-Aware 3D Chiplet Floorplanning via Convolution-Embedded MILP

Shuo Ren, Libo Shen, Yaohui Han +4

As traditional Moore's Law scaling slows down, 3D-ICs stack multiple active dies vertically to sustain performance scaling. However, this vertical stacking traps heat inside, makin…