1 citations · 1 across the 4 of their papers we have counts for
6 papers
HINT: Toward an Executable Hardware-Intent Representation Layer for LLM-Driven RTL Generation
Tairan Cheng, Yi Liu, Dongsheng Zuo +6
Generating implementation-quality RTL with large language models (LLMs) remains difficult because direct generation must resolve microarchitecture while simultaneously producing an…
Retrieve, Schedule, Reflect: LLM Agents for Chip QoR Optimization
Yikang Ouyang, Yang Luo, Dongsheng Zuo +1
Modern chip design requires multi-objective optimization of timing, power, and area under stringent time-to-market constraints. Although powerful optimization algorithms are integr…
PrefixAgent: An LLM-Powered Design Framework for Efficient Prefix Adder Optimization
Dongsheng Zuo, Jiadong Zhu, Yang Luo +1
Prefix adders are fundamental arithmetic circuits, but their design space grows exponentially with bit-width, posing significant optimization challenges. Previous works face limita…
UFO-MAC: A Unified Framework for Optimization of High-Performance Multipliers and Multiply-Accumulators
Dongsheng Zuo, Jiadong Zhu, Chenglin Li +1
Multipliers and multiply-accumulators (MACs) are critical arithmetic circuit components in the modern era. As essential components of AI accelerators, they significantly influence…
RL-MUL 2.0: Multiplier Design Optimization with Parallel Deep Reinforcement Learning and Space Reduction
Dongsheng Zuo, Jiadong Zhu, Yikang Ouyang +1
Multiplication is a fundamental operation in many applications, and multipliers are widely adopted in various circuits. However, optimizing multipliers is challenging due to the ex…
E-Syn: E-Graph Rewriting with Technology-Aware Cost Functions for Logic Synthesis
Chen Chen, Guangyu Hu, Dongsheng Zuo +3
Logic synthesis plays a crucial role in the digital design flow. It has a decisive influence on the final Quality of Results (QoR) of the circuit implementations. However, existing…