most citedHigh Performance Im2win and Direct Convolutions using Three Tensor Layouts on SIMD Architectures

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cs.DC2026

Enabling Memory-efficient Im2win Convolution with Multi-precision Support on GPU CUDA and Tensor Cores

Xiang Fu, Jixiang Ma, Xinpeng Zhang +3

Convolution is a principal computational bottleneck in deep neural networks, and its efficiency depends on tight integration between algorithms and GPU hardware. Existing GPU convo…