4 papers
SLED-IFV: Solver-Validated LLM-Guided Decomposition for Scalable Hardware Information-Flow Verification
Liangtao Dai, Yimin Gao, Melika Morsali +1
Formal hardware information-flow verification (IFV) provides strong guarantees against secret-dependent timing and control behavior, but often scales poorly on realistic RTL. We id…
FlexPosit: Tunable Fractional Precision for LLM Inference Accelerators
Yimin Gao, Liangtao Dai, Jun Yin +2
Large language models (LLMs) offer remarkable capabilities but impose prohibitive compute and energy costs. Quantization governs the trade-offs between accuracy and hardware effici…
High-Performance Low-Power Adiabatic Systolic Array Design in Advanced FinFET Nodes
Jun Yin, Liangtao Dai, Yimin Gao +1
Adiabatic logic has traditionally been recognized as a low-power solution but constrained to low clock speeds to preserve adiabatic behavior. For advanced FinFET nodes, however, cl…
Guarded Equivalence Predicates for Scalable Formal Hardware Information-Flow Verification
Liangtao Dai, Yimin Gao, Melika Morsali +1
Formal hardware information-flow verification is a principled way to rule out secret-dependent functional or timing observations, but scaling such proofs remains difficult. Self-co…