1 citations · 1 across the 3 of their papers we have counts for
3 papers
LLM-based Hardware Development with Hierarchical IRs and End-to-End Multi-Agent Workflow
Chenyang Yin, Agasthi Haputhanthri, Aditya Anirudh Jonnalagadda +7
Large language models (LLMs) are increasingly used in software development, but their use in complex hardware design remains limited. This gap stems from both the scarcity of publi…
Proof-Stitch: Proof Combination for Divide and Conquer SAT Solvers
Abhishek Nair, Saranyu Chattopadhyay, Haoze Wu +2
With the increasing availability of parallel computing power, there is a growing focus on parallelizing algorithms for important automated reasoning problems such as Boolean satisf…
Scaling Up Hardware Accelerator Verification using A-QED with Functional Decomposition
Saranyu Chattopadhyay, Florian Lonsing, Luca Piccolboni +12
Hardware accelerators (HAs) are essential building blocks for fast and energy-efficient computing systems. Accelerator Quick Error Detection (A-QED) is a recent formal technique wh…