1 citations · 1 across the 3 of their papers we have counts for
3 papers
Process-Technology Co-optimization for 2D-FETs
Shao-Heng Yang, Jainil Dharmil Shah, Mayukh Das +15
We present the first experimental machine learning (ML)-enabled Process-Technology Co-Optimization (PTCO) framework for optimizing 2D transition metal dichalcogenide (TMD) FET fabr…
Are gate-all-around 2D CFETs the optimal architecture for the A2 node and beyond?
Fengben Xi, Gautam Gaddemane, Anshul Gupta +15
As logic scaling enters the angstrom era, vertically stacked complementary field-effect transistors (CFETs) based on atomically thin two-dimensional (2D) semiconductors offer a pot…
Seed Layer Engineering for Effective Charge Transfer Doping of MoS Transistors
Sahej Sharma, Shao-Heng Yang, Himani Jawa +13
Integrating two-dimensional semiconductors such as MoS with dielectric materials remains a central challenge for their use in future logic technologies. While seed layers are t…