2 papers
cs.AR2026
FASE: FPGA-Assisted Syscall Emulation for Rapid End-to-End Processor Performance Validation
Chengzhen Meng, Xiuzhuang Chen, Bingcai Sui +3
The rapid advancement of AI workloads and domain-specific architectures has led to increasingly diverse processor microarchitectures, whose design exploration requires fast and acc…
cs.AR2026
SimulatorCoder: DNN Accelerator Simulator Code Generation and Optimization via Large Language Models
Yuhuan Xia, Tun Li, Hongji Zhou +3
This paper presents SimulatorCoder, an agent powered by large language models (LLMs), designed to generate and optimize deep neural network (DNN) accelerator simulators based on na…