2 papers
cs.AR2026
Spec2Cov: An Agentic Framework for Code Coverage Closure of Digital Hardware Designs
Sean Lowe, Elias Hilaneh, Alma Babbit +3
Hardware verification is one of the most challenging stages of the hardware design process, requiring significant time and resources to ensure a design is fully validated and produ…
cs.AR2024
HLSFactory: A Framework Empowering High-Level Synthesis Datasets for Machine Learning and Beyond
Stefan Abi-Karam, Rishov Sarkar, Allison Seigler +7
Machine learning (ML) techniques have been applied to high-level synthesis (HLS) flows for quality-of-result (QoR) prediction and design space exploration (DSE). Nevertheless, the…