7 papers
A Survey of Adversarial Efficiency Degradation for Vision Transformer by Exploiting Input-adaptive Optimization
Anadi Goyal, Nandish Chattopadhyay, Anupam Chattopadhyay +1
Vision Transformers (ViTs) increasingly rely on input-adaptive inference, such as token pruning and early halting, to meet energy and latency budgets. This survey examines a recent…
MOAT: Model-Agnostic Randomized Transformations for preventing Efficiency Degradation Attacks on ViTs
Anadi Goyal, Nandish Chattopadhyay, Chandan Karfa +2
To adopt the Vision Transformers (ViTs) in resource-constrained environment, token pruning is widely used to reduce computational cost without impacting accuracy. However, adversar…
LLM Assisted Verification Assertion Generation: Challenges and Future Directions
Bhabesh Mali, Chandan Karfa
Assertion-based Verification (ABV) plays a critical role in the Design Verification (DV) process. However, ABV requires substantial manual effort in generating assertion from speci…
Controller Datapath Aware Verification of Masked Hardware Generated via High Level Synthesis
Nilotpola Sarma, Vaishali Ghanshyam Chaudhuri, Chandan Karfa
Masking is a countermeasure against Power Side Channel Attacks (PSCAs) in both software and hardware implementations of cryptographic algorithms. Compared to software masking, impl…
STRAP-ViT: Segregated Tokens with Randomized -- Transformations for Defense against Adversarial Patches in ViTs
Nandish Chattopadhyay, Anadi Goyal, Chandan Karfa +1
Adversarial patches are physically realizable localized noise, which are able to hijack Vision Transformers (ViT) self-attention, pulling focus toward a small, high-contrast region…
David vs. Goliath: Can Small Models Win Big with Agentic AI in Hardware Design?
Shashwat Shankar, Subhranshu Pandey, Innocent Dengkhw Mochahari +4
Large Language Model(LLM) inference demands massive compute and energy, making domain-specific tasks expensive and unsustainable. As foundation models keep scaling, we ask: Is bigg…