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cs.AR2025
Simopt-Power: Leveraging Simulation Metadata for Low-Power Design Synthesis
Eashan Wadhwa, Shanker Shreejith
Excessive switching activity is a primary contributor to dynamic power dissipation in modern FPGAs, where fine-grained configurability amplifies signal toggling and associated capa…
cs.AR2024
Simopt -- Simulation pass for Speculative Optimisation of FPGA-CAD flow
Eashan Wadhwa, Shanker Shreejith
Behavioural simulation is deployed in CAD flow to verify the functional correctness of a Register Transfer Level (RTL) design. Metadata extracted from behavioural simulation could…