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M. Danelutto

4 papers hereh-index 334.5k citations292 works total

Matching runs newest-first, so older work may not be attached to this profile yet.

author position
  • first author1
  • middle author1
  • last author2

Across the 4 of 4 papers where every author was matched, so the position is known.

fields
  • cs.DC3
  • cs.AR1

identity via Semantic Scholar / OpenAlex

activity
20162024
most citedA parallel pattern for iterative stencil + reduce

10 citations · 13 across the 4 of their papers we have counts for

collaborators

4 papers

cs.DC2024★ 2 cited

Stream parallel skeleton optimization

Marco Aldinucci, Marco Danelutto

We discuss the properties of the composition of stream parallel skeletons such as pipelines and farms. By looking at the ideal performance figures assumed to hold for these skeleto…

cs.AR2023

Power Aware Scheduling of Tasks on FPGAs in Data Centers

Rourab Paul, Marco Danelutto

A variety of computing platform like Field Programmable Gate Array (FPGA), Graphics Processing Unit (GPU) and multicore Central Processing Unit (CPU) in data centers are suitable f…

cs.DC2016★ 1 cited

State access patterns in embarrassingly parallel computations

Marco Danelutto, Massimo Torquati, Peter Kilpatrick

We introduce a set of state access patterns suitable for managing state in embarrassingly parallel computations on streams. The state access patterns are useful to model typical st…

cs.DC2016★ 10 cited

A parallel pattern for iterative stencil + reduce

M. Aldinucci, M. Danelutto, M. Drocco +4

We advocate the Loop-of-stencil-reduce pattern as a means of simplifying the implementation of data-parallel programs on heterogeneous multi-core platforms. Loop-of-stencil-reduce…

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Not affiliated with arXiv. Researcher data from Semantic Scholar (ODC-BY) and OpenAlex.