1 citations · 1 across the 3 of their papers we have counts for
3 papers
cs.LG2026
PPAPlace: Differentiable Cross-Stage Objectives for Chip Placement Optimization
Ruogu Chen, Jie Han
Macro placement significantly affects a chip's post-route performance, power, and area (PPA). Most placement methods optimize half-perimeter wirelength (HPWL) as the primary object…
cs.LG2026
CoEvoP&R: Co-Evolving Placement Objectives with Routing Feedback via Large Language Models
Ruogu Chen, Weihua Xiao, Ramesh Karri +1
Analytical placers rely on differentiable objective functions to guide placement, typically combining intermediate surrogate metrics such as half-perimeter wirelength (HPWL) and ce…
cs.AR2024★ 1 cited
An Architectural Error Metric for CNN-Oriented Approximate Multipliers
Ao Liu, Jie Han, Qin Wang +2
As a potential alternative for implementing the large number of multiplications in convolutional neural networks (CNNs), approximate multipliers (AMs) promise both high hardware ef…