3 citations · 3 across the 2 of their papers we have counts for
2 papers
cs.AR2026
Dryas: A Reprogrammable Engine for High-Speed Interconnect Tracing and Analysis
Manuel Bröchin, Tom Kuchler, Michael Giardino +2
The proliferation of heterogeneous components in modern computing systems has been accompanied by new higher bandwidth and lower latency interconnects. These interfaces and protoco…
cs.AR2024★ 3 cited
Rethinking Programmed I/O for Fast Devices, Cheap Cores, and Coherent Interconnects
Anastasiia Ruzhanskaia, Pengcheng Xu, David Cock +1
Conventional wisdom holds that an efficient interface between an OS running on a CPU and a high-bandwidth I/O device should use Direct Memory Access (DMA) to offload data transfer,…